Lattice offers FPGA reference design for machine learning

Lattice Semiconductor has created FPGA reference designs that support LoRa communications, elliptic curve cryptography (ECC) security, signal aggregation and machine learning.

The reference design is based on the firm’s iCE40 UltraPlus FPGAs which are designed for low power and small form-factor.

Target applications for the reference designs include:

• Machine Learning / On-device Artificial Intelligence – Employs trained neural network algorithms for always-on, low power human face detection using a low resolution image sensor
• Graphics Acceleration – Supports always on graphics such as clocks in mobile and wearable device displays at ultra-low power, while the application processor is dormant
• ECC Security – Encrypts sensor data before transmission to the Cloud or setup an authenticated communications protocol between two systems
• LoRa – Controls a LoRa compatible radio to send processed sensor data miles away

C.H. Chee, senior director of marketing at Lattice Semiconductor, writes:

“With improved DSP performance, flexible I/Os and increased memory for buffering, the iCE40 UltraPlus brings added intelligence to smartphones and IoT edge products, and security to the cloud.”

“The new iCE40 UltraPlus solutions underscore our commitment to continuously provide our customers with updated resources for designing solutions for new markets quickly.”

The iCE40 UltraPlus is notable for its 1.1Mbit of on-chip RAM and eight DSPs.